VI13 architecture from FIC

Potential possibilities of the computer are defined by its pattern. It know not only experts, but also many users. Thus, paying the most steadfast attention to the central processor unit, most experimental of them know, that is far not the last role in the computer the motherboard plays. This component of the system which have concentrated in overwhelming number of controllers, substantially defines its future potential.

The architecture of modern motherboards is grounded on application of the newest electron technologies. Thus implementation of these processing techniques is carried out through used chips, design and production of these cards. Technical parametres and operation of the future computers depend on these units and quality of manufacture of cards, eventually.

Many computer corporations are engaged in development and release of motherboards. To well-known domestic users some of them, for example, FIC corporation. Production of this corporation basically has been presented to long time by inexpensive products. However recently in the market rather difficult products possessing the big set of functionality began to appear. As an example it is possible to result motherboard VI13 created on the basis of chip set SiS645DX.

Chip set SiS645DX which is a basis of motherboard VI13, is developed on the basis of a set of specialised logic SiS645. Chip set SiS645DX is oriented to systems with processors of Intel of Pentium 4 with Socket 423/478 plugs and with clock rate of bus FSB of type QPB of 100 and 133 MHz (Quad-Pumped Bus).

Bus FSB of type QPB at clock rate of 100 MHz carries out data transfer with frequency of 400 MHz, an address part — 200 MHz that capacity to 3,2 Gbytes/with provides peak . At clock rate of 133 MHz data transfer is carried out with frequency of 533 MHz, and an address part — 266 MHz. In this mode peak capacity reaches values of 4,3 Gbytes/with.

It is necessary to remind, that development and release of chip set SiS645 SiS corporation has broken tradition of multiplexing in one tank of the components fulfilling functions North Bridge and South Bridge. Such chips, as well as in solutions of competitors, in chip set SiS645 and its more perfect variant SiS645DX two. Thus as the main bus for their interconnection firm bidirectional 16-bit wire MuTIOL with capacity of 512 Mb per second (16 bits h 4 h 66 MHz) is applied   .

The main advantage of this bus — possibility of competitive access when for each arrangement using the bus the independent stream is selected. As a result, at call to MuTIOL a considerable quantity of the arrangements, each of them receives the guaranteed parallel stream, that finally considerably reduces delays (latentnost) and allows to avoid occurrence of collisions. Thus, data transfer between controllers South Bridge and the processor with dynamic storage at high load garantirovanno is fulfilled faster, than in other chip sets which are not possessing similar possibilities.

Resources of interfaces of operation with the processor, the videoadapter, dynamic storage and South Bridge are built in chip North Bridge which is a part of a chip set, — Host and Memory and AGP Controller.

Built in in SiS645DX controller FSB of type QPB supports: the bus with clock rate of 100/133 MHz, 200/266 MHz Address and 400/533 MHz Data, queue of calls to the bus depth 12 and other functions and processing techniques.

The built in controller of memory provides support: memories DDR SDRAM (Double Data Rate SDRAM — SDRAM with data transfer on lobbies and back edges of clock pulses of the bus of memory), DDR200/266/333, a maximum memory size — to 3 Gbytes in 3 DIMM. The maximum transfer rate makes to 1,6/2,1/2,7 Gbytes/with at DDR200/266/333.

The built in controller of a drawing supports one arrangement AGP with support of modes AGP 2.0 1X/2X/4X and Fast Writes.

Handle of peripheral devices is carried out by the second chip of the chip set which has received name MuTIOL Media I/O.

The base set of chip set SiS645DX consists of two chips fulfilled in tanks of standard BGA: SiS645DX Host and Memory and AGP Controller — North Bridge, 702 BGA, 0,18 microns, 1,9 In; SiS961 MuTIOL Media I/O — South Bridge.

The built in resources of a base set support: two channels IDE with support ATA 33/66/100 (to 4 arrangements IDE), two channels USB (6 ports), PCI 2.2 (to 6 BusMaster arrangements), operation PS/2 of the keyboard and the mouse, interface LPC 1.0 (Low Pin Count), AC ' 97 2.2 with support of 6 audiochannels for 5.1 Dolby Digital, 10/100 Mb Fast Ethernet or 1/10 Mb HomePNA 1, ACPI 1.0b, APM, and also other resources and functions.

Key parametres of chips South Bridge used together with chip set SiS645DX