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Chip sets: change of the leader (a part II)

Evgenie Rudometov, Victor Rudometov.
authors@rudometov.com

Article is grounded on substances of books «Arrangement of the multimedia computer» and «Motherboards and chip sets».

i820 And i820E

The chip set i820 (i820 Сhipset) is continuation of a line of specialised chipsets of system logic of the corporation of Intel as which ancestor has served i810 (i810 Chipset). It is announced as changeover i440BX. It is optimised for processors of Intel of Pentium II and Pentium III, working at frequency of the bus of processor Host Bus (FSB) 100 and 133 MHz. Thus support by a chip set frequency 66 MHz, necessary for processors Celeron with the architecture of kernel Deshutes and Mendocino, for the specified bus is not provided. It is linked to a led policy of Intel on sharing of sectors of the market and release for each sector of the specialised sets.

The chip set structure i820, as well as its predecessor i810, is based on usage habovoj architectures which allows to optimise structure of the computer and to accelerate an informational exchange between arrangements with the minimum loading of the processor for similar operations.

As the main bus for interconnection of the hubs which are a part of a chip set, specially developed, closed bus providing capacity to 266 Mb per second is applied .

The built in interface of operation with memory (DRAM interface) supports one channel of memory of processing technique Direct Rambus. Clock rate of the channel — to 400 MHz. The transmission frequency of data which is carried out on front and back fronts of a clock signal, at clock rate of the channel of 400 MHz as a result of such processing technique reaches 800 MHz. Maximum memory size DRDRAM (Direct Rambus DRAM), presented by RIMM units, can reach 1 values of Gbytes.

In the systems constructed on a basis i820, usage of traditional memory of type SDRAM is possible. With that end in view for the given chip set the alternate mode of operation with memory — MTH mode is provided . This mode demands usage of a special chip 82805AA Memory Translator Hub (MTH).

Built in structure of a chip set interface AGP ensures functioning of one arrangement AGP with support of modes 1X/2X/4X.

Informational streams i820 and i815

The interface

The clock
Frequency, MHz

Data transfers for clock tick

Digit capacity
Buses, byte

Pass-band, Mb/with

FSB

100/133

1

8

800/1066

RDRAM

266/300/356/400

2

2

1066/1200/1422/1600

SDRAM with MTH

100

1

8

800

SDRAM

66/100/133

1

8

533/800/1066

AGP 2.0 1X/2X/4X

66/66/66

1/2/4

4

256/533/1066

Hub interface

66

4

1

266

PCI 2.2

33

1

4

133

The built in resources of input/output (I/O) an appropriate hub — I/O Controller Hub (ICH) carry out support: to 6 arrangements PCI (PCI Rev. 2.2), 2 ports IDE with UltraDMA/33 and UltraDMA/66, 2 ports USB, AC ’ 97 2.1, ACPI 1.0, interface Low Pin Count (LPC) etc .

The base variant of a chip set i820 consists of three chips: 82820 Memory Controller Hub (MCH), 82801AA I/O Controller Hub (ICH), 82802 Firmware Hub (FWH). For support of memory modules SDRAM in addition to a base set the fourth chip — 82805AA Memory Translator Hub (MTH) uses .

It is necessary to mark, that usage MTH with a chip set i820 which architecture is oriented to usage of memory Direct Rumbus DRAM — DRDRAM, is a compulsory measure which is a consequence concerning the high price of RIMM units, exceeding in 2000 the price of SDRAM units having the same size, in 5-7 times. And it thus, that testing shows absence of an essential gain of productivity on widespread applications at transition from the systems grounded on usage of a chip set i440BX with SDRAM units, to the systems created on base i820 with RIMM units. It is linked by that as show researches, systems the using memory modules RIMM created on the basis of processing technique DRDRAM, become effective in case of the programs demanding operations of reading/writing of the big bulks. It rather seldom uses in real applications where now dominate casual access and operations with blocks of small length.

Usage of chip MTN which is hooked up to channel Rambus leads to the considerable delays linked to interface negotiation Rambus and SDRAM, counter streams of pilot signals demanding translation and data. Besides, operation of chips DRDRAM which is a part of RIMM units, is accompanied by considerable delays. In addition to it, it is necessary to pay attention that with hub MTH SDRAM units work on the fixed frequency of 100 MHz, despite possibility of usage frequency of the bus of the processor of 133 MHz, the bus increasing capacity to 30 %. Usage raised frequency for a memory subsystem, would allow to increase its capacity considerably. The fixed frequency for a memory subsystem, besides not reaching the peak value, means, that the chip set loses one of the important advantages — possibility of an asynchronous mode for a memory subsystem. Presence and application of asynchronous modes of modes allows to increase stability of system at usage nizkoskorostnyh memory modules (PC100) and to raise capacity of memory, and eventually and computer power, in the presence of high-speed (PC133 units.

In addition to the problems linked to hub MTH, otnositelno recently it was clarified, that in some cases, the systems using in structure MTH, show labile operation. It has forced Intel corporation to refuse wide application of patterns with MTH and even to go on changeover of similar systems on equivalent with memory DRDRAM. Moreover, Intel corporation, has carried out payment of compensations to a number the corporation-manufacturers of motherboards, and also to some corporations releasing computers.

In addition to it, it is necessary to mark, that patterns with MTH do not allow to realise in full possibility of a graphics subsystem. The matter is that for correct operation of the video subsystem supporting mode AGP 4X, it is necessary, that capacity of an operative (system) computer memory was, at least, above capacity of bus AGP. It is linked by that the architecture of modern chip sets, including i820, provides possibility of simultaneous access to system memory as the videoadapter with a stream of 1 Gbytes/with at AGP 4X, and the processor capable, by the way, to handle the information with speed to 1 Gbytes/with at frequency of the bus of the processor of 133 MHz. To them it is necessary to add inquiries of a hard disk and arrangements PCI. From here follows, that in a pattern i820, MTH and SDRAM units with capacity only 800 Mb per second support of mode AGP 4Х has more likely conditional character as capacity of a subsystem of dynamic storage does not allow to load completely bus AGP in a mode 4X and thus, to realise one of the main advantages of modern chip sets. Therefore it is impossible to consider a chip set variant i820 with MTH and memory SDRAM worthy alternative to the base package providing usage DRDRAM.

Considering the architecture and possibilities of a chip set i820, it is necessary to mark, that the improved variant of a chip set i820 — i820E (i820E Сhipset), oriented to processors of Pentium II and Pentium III, including Pentium III Coppermine FC-PGA, working is created     at frequency of the bus of processor Host Bus (FSB) 100 and 133 MHz. This chip set is intended for powerful, high-powered computers (Performance Desktop).

All advantages i820E in comparison with i820 are linked to usage of more perfect variant of a hub of input/output — I/O Controller Hub2 (ICH2).

Structure ICH2 includes following controllers: the interface with MCH, 2-channel UltraDMA/100 IDE (4 arrangements IDE, reading to 100 Mb per second, writing to 89 Mb per second), 2 USB (only 4 ports), I/O APIC, SMBus, the interface with FWH, LPC (allows to hook up arrangements ISA and X-Bus, such as Super I/O, controllers of the keyboard, the flexible drive, parallel, consecutive ports), AC ’ 97 2.1 (to 6 channels of audio), PCI 2.2 (to 6 arrangements PCI), LAN (c Intel 82562EH — 1 Mbit/with HomePNA, Intel 82562ET — 10/100 Mbit/with Ethernet), System and Power Management.

The base variant of a chip set i820E consists of three chips: 82820 Memory Controller Hub (MCH), 82801BA I/O Controller Hub (ICH2), 82802 Firmware Hub (FWH).

Summing up to consideration of chip sets i820 and i820E, it is necessary to mark, that they have absorbed all best reachings of modern computer processing techniques. However, despite all advantages of the given chip sets, cheaper, and in some cases and more efficient chip set i440BX has not lost the attractiveness, especially in case of usage as a part of motherboards of the additional controllers realising, for example, UltraDMA/66 protocol, LAN etc . Nevertheless, it is necessary to recognise, that many innovations realised in i820 architecture and i820E, are extremely perspective. And productivity of a subsystem of dynamic storage can be essentially raised. It can be made, for example, by modification of appropriate chains of the interface of memory as a part of a chip set, allowing usage not one, as for i820 and i820E, and several channels Rambus, as for i840. However it can be reached and aparatnoj implementation of the interface with become traditional PC133 SDRAM, as, for example, in a case i815 and i815E. And in the long term productivity increase link to possibility of usage of perspective memory DDR SDRAM (Double Data Rate SDRAM), presented already now PC200 units (PC1600 DDR SDRAM) and PC266 (PC2100 DDR SDRAM).

i815 And i815E

Chip sets i815 (i815 Сhipset) and i815E (i815E Сhipset), as well as their predecessors i810-i820E, are constructed on the basis of usage habovoj architectures (Accelerated Hub Architecture). These chip sets are intended for high-powered computers with processors of type of Intel of Pentium II/III and Celeron with Slot 1 plugs and Socket 370 and frequency of bus FSB of 66/100/133 MHz, including processors Celeron and Pentiums III developed with usage of kernel Coppermine.

The architecture of chip sets i815 and i815E has been created with usage of the best solutions and the processing techniques created both debugged in engineering process and maintenance of the predecessors.

It is necessary to mark, that a basis of the chip which is responsible co-ordinated and productive work of the processor, memory and video resources — hub GMCH, the matching component from i810/i810E has served. However, unlike the prototypes, new hub GMCH admits not only usage of the built in video resources, but also external, as a rule, more powerful videoadapter which is hooked up to bus AGP.

As a hub providing functioning of other components of the computer, are applied either ICH, or ICH2, earlier used in structure i820 and i820E. The package of new variant GMCH with ICH has received the name i815, and the same GMCH with ICH2 — i815E.

The built in controller of memory which are a part of hub GMCH, supports 64 bits the interface of memory of traditional type — SDRAM. Memory size SDRAM can make from 32 to 512 Mb. The maximum number of units reaches three PC100/133 DIMM. From the previous chip sets possibility of operation of a subsystem of memory in asynchronous modes that provides the raised levels of flexibility, dependability, productivity is inherited.

Built in structure of chip sets i815 and i815E resources provide support: AGP with modes 1X/2X/4X, the integrated resources of a drawing on a basis i752, providing the permission to 1600x1200 at 8 bits of colour and at 85 Hz of vertical scanning (24 bits of 230 MHz RAMDAC); to 6 arrangements PCI; 2 (i815) or 4 (i815E) ports USB; 2 ports IDE or with UltraDMA/33/66 (i815), or with UltraDMA/33/66/100 (i815E); interface LPC (Low Pin Count), controller LAN (i815E); AC ’ 97 audio c 2 (i815) or with 6 (i815E) channels; ACPI and other functions and arrangements.

Unlike the leader of the previous generation — i440BX the given new sets at the expense of relation support 1:2 provide correct creation of frequency value of bus AGP, as for 66 and 100 MHz of the bus of processor FSB, and for value frequency 133 MHz of this bus. It not only provides high efficiency of system of the computer, but also, considering the big potential possibilities of processors of Pentium III with kernel Coppermine, opens new possibilities for the experiments linked to maintenance of units and subsystems of the computer in forced modes (overclocking — dispersal).

The chip set i815 consists of 3 chips: 82815 Graphics and Memory Controller Hub (GMCH), 82801AA I/O Controller Hub (ICH), 82802 Firmware Hub (FWH).

The chip set i815E consists of 3 chips: 82815 Graphics and Memory Controller Hub (GMCH), 82801BA I/O Controller Hub (ICH2), 82802 Firmware Hub (FWH).

Structure of the computer with a chip set i815E Chipset

Systems on the basis of chip sets i 815 and i815E possess high efficiency and wide functionality. The given chip sets calculated for traditional memory SDRAM, presented by DIMM PC100 units and PC133, actually are worthy successors of chip sets i440BX and i440ZX though for this role Intel corporation announced earlier released chip sets i820 and i820E c memory Rаmbus.

All main manufacturers of motherboards have already declared the products as which basis chip sets i815 and i815E have served.

Considering high efficiency and wide functionality of the systems created with usage of chip sets i815 and i815E, there is an underplate to assert, that new sets of system logic can repeat success of the glorified chip set i440BX.

Basic performances of chip sets i815/i815E

Characteristics

Intel 815E

Intel 815

North Bridge

82815

82815

Processors

Celeron
Pentium II/III

Celeron
Pentium II/III

ТипFSB

AGTL +

AGTL +

Frequency FSB, MHz

66/100/133

66/100/133

The memory bus, MHz

66/100/133

66/100/133

Max. Size, Mb

512

512

Memory modules

PC66/100/133

PC66/100/133

Memory type

SDRAM

SDRAM

Max. DIMM

3

3

ECC

No

No

Asynchronous modes

Yes

Yes

AGP

1X/2X4X.

1X/2X4X.

The integrated drawing

Yes, i752

Yes, i752

South Bridge

82801BA

82801AA

IDE

UltraDMA/100

UltraDMA/66

USB, ports

4

2

PCI, arrangements

6

6

The integrated sound

Yes, 6 channels

Yes, 2 channels

LAN

Yes

No

ACPI/OnNow

Yes

Yes

PCI, arrangements

6

6

It is published in log "Terabyte"

To return to a part I

To pass to razrelu Motherboards and chip sets



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