Transportable solutions of Intel

Development and release of processors Mobile of Pentiums III-M created on the basis of kernel Tualatin, Intel corporation has strengthened the position in the market of transportable solutions. However for this purpose its implementators had to solve the whole complex of uneasy problems, including mastering of the newest procedure and development of appropriate specialised sets of system logic.

In the conditions of hard competitive struggle and the deep crisis which has captured industries of high technologies, the computer companies continue development and release of perspective products. The newest efficient processors making a basis of modern computers concern these products first of all. It is necessary to mark, that their architectures are in a state of the permanent changes called by continuous implantation of perspective solutions. Thus, despite increasing pressure of the competitors, in the lead position in these operations Intel company continues to save. As is known, it possesses the highly skilled experts which operation is supported technological, industrial and financial resources of the giant of the computer industry. However, despite all enumerated, even such giant has variety of the problems generated by implantation of processing techniques and release on their basis of the newest products, such, for example, as efficient processors and the chip sets linked to them.

For anybody not a secret, that become traditional the architecture of processors P6 grounded on usage of a procedure of 0,18 microns, practically has reached the limit. For Pentium III with kernel Coppermine this limit is somewhere around 1,2–1,4 GHz.

It is easy to be convinced of a correctness of the specified estimation, parsing, for example, results of speeding up of operation — "dispersal" (overclocking) models of processors with a different operating frequency from the given bar of products. Really, in the course of exhaustive search of representatives of lineup Coppermine, from low models to seniors, step-by-step lowering of the technological and architectural store, doing possible dispersal of processors is observed. Lowering of the given resource also testifies to presence of the specified limit. Approximating of results also leads to the mentioned estimation of 1,2-1,4 GHz.

Unfortunately, limitation of growth of computational capability of processors of the given number is not a unique problem. Approximation to a technological limit leads to a low dice yield and, accordingly, to growth of the cost price for the upper models of the processors which operating frequencies have already reached the specified limit. Besides, in process of growth of computational capability of processors, them energopotreblenija and, as consequence, increases teploobrazovanija become aggravated problems of maintenance of optimal temperature modes their operations reaching of critical values near to technological limits. All it constrains development of the specified number of the processors created on the basis of kernel Coppermine (0,18 microns).

The output from the formed position consists or in cardinal change of the architecture of kernels of processors, or in perfection of a procedure. It is obvious, that operations on processing technique perfection should be routed first of all on reduction of the sizes of units by chips of processors and lowering of supply voltages of their inner patterns.

Experts of Intel have gone both paths. For example, for Pentium 4 NetBurst architecture which admits scaling in the wide limits, providing release more and more high-frequency, and consequently, and more efficient models has been created. The refinement of a procedure of production of processors has allowed to create on the basis of previous development Coppermine the new kernel Tualatin which has become by a basis, first of all, of new, high-powered processors of a transportable number, come in the stead to the previous products.

The new procedure (130 nanometrov) provides 0,13 microns essential reduction of the sizes of chips of processors that allows at increase in operating frequencies to several gigacycles (GHz) to lower a supply voltage of a kernel to 1,4 In and more low, it energopotreblenie and, accordingly, a heat release. This procedure has allowed to create the processors grounded on usage of transistors with width of a lock 70 nanometrov (nanometer) and a gate-oxide thickness of 1,5 nanometers (for the future developments transistors with thickness of a lock of 0,8 nanometers are already created). Besides, reduction of the sizes of chips almost twice increases their output from one standard silicon slice in diameter of 200 mm that reduces the cost price and consequently, and the price of finite products.

But implementators and production workers have gone further away. They not only have improved a procedure of production of the modern chips consisting already from tens millions of units (in the near future this metric will exceed 100 million), but also have passed from silicon slices in the size of 200 mm to slices of 300 mm. It has allowed to quadruple at usage of a procedure 0,13 microns quantity of processors in comparison with previous tehprotsessom 0,18 microns and slices of 200 mm. The cost price of the chips made on 300-cross-section slices, at least, on 30 % more low, than on 200-cross-section. Thus counting on one ready chip it is spent for 40 % of less energy and water that improves not only economic metrics, but also promotes solution of environmental problems.

Evolution of transportable processors of Intel

In addition to the specified reachings of designers and technologists interconnectings on the basis of six layers of two-layer copper explorers have been used at the big ratio of a thickness of explorers to width (1,6:1). It provides reduction of an electrical resistance at high density of allocation. Besides, in production of the newest chips and processors interconnectings and insulators with a small dielectric coefficient have been used also.

The size of connective explorers manages to be reduced thanks to application as an isolating substance of the silicon dioxide alloyed by fluorine (SiO2), having a small dielectric coefficient (3,6). From a dielectric material with a dielectric coefficient small the isolation between metallization layers of a chip of the processor is fulfilled also. As is known, high quality of isolation allows to minimise level of mutual interferences between electrical signals.

It is obvious, that with reduction of distances between units and interconnectings in chips of processors level of interferences increases, a leakage current increases, thermal load on sites and the separate units making a basis of kernels grows. Data of problems y have objective character. Their existence speaks the processes occurring in semiconductors operating with units which sizes promptly decrease. Moreover, they fast come nearer to those thresholds where the quantum effects complicating processes of engineering more and more affect, production and maintenance.

However perfection have coped with the specified problems. As a result of efforts of designers it was possible to increase productivity of products: the big high-speed performance of transistors and high performance of interconnectings in 130 nanometers a procedure have allowed to increase high-speed performance of integral chips by 65 % in comparison with level which the processing technique provides of 180 nanometers.

All it has allowed to adjust release of processors with the kernel which has received name Tualatin. The first models of processors with kernel Tualatin incorporate the cache memory of second level L2 in size of 512 Kbytes, integrated directly in a chip, and are oriented exclusively to transportable solutions. The finite product has received name Mobile Pentium III or Pentium III-М.

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