Intel OF PENTIUM 4 c Hyper-Threading

Cпустя 31 year after release of the first-ever processor, has been declared the new leader among processors. This processor of NetBurst architecture is the most powerful representative of the bar of Intel of Pentium 4. It is created on processing technique 0,13 microns, has kernel Northwood, the cache memory of the second level (L2) 512 Kbytes, an operating frequency of 3,06 GHz, is calculated for operation in systems with the processor bus of 533 MHz (clock rate FSB of 133 MHz that provides a transmission frequency of the given 533 MHz) and oriented to the market of desktop computers (Desktop).

Being the most efficient model, this processor has personified all advanced achievements of experts of Intel. These reachings in aggregate with the potential which has been put in pawn in NetBurst architecture, have allowed to reach so high clock rates of a kernel, and also buses of cache memory L2 and processor FSB.

But for anybody not a secret, that development of high-frequency products is extremely a challenge demanding the permission of numerous scientific and technical problems.

Really, still any two-three ten years ago such boundaries were considered inaccessible for a semiconductor engineering on a basis traditsinnogo silicon, but even for gallium arsenide considered as its successor. Gigagertsevye frequencies were subject only to the special instruments which do not have anything common with the arrangement of semiconducting transistors and few similar to radio tubes. The arrangements created on the basis of units of type klistronov, magnetronov, the various lamps created on effect of a travelling wave, resonators, etc. were such instruments .

And only systematic perfection of electron technologies and the architecture of chips allowed to reduce step-by-step the value of units, to increase operating frequencies and productivity of the semiconducting products consisting quite often already from tens millions of units. And in immediate prospects as Krejg Barret has declared at Forums IDF CEO Intel, appearance of arrangements of the transistors created from billions and working on the frequencies exceeding 10 GHz is expected . It in hundred thousand times more frequencies of the first processor i4004, considered at the moment of the release by top of perfection and a limit existing then processing techniques.

But each following megacycle, and now and the gigacycle, is given all more difficultly, despite seeming simplicity and a regularity of appearance of new more and more high-frequency and more efficient models of processors.

However frequency growth is not a unique resource of rise of productivity. Experts permanently offer new paths and resources. Them of a steel, for example, implementation of new, additional commands and even groups the command of type MMX, SSE and SSE2. Another by is usage of numerous pipelines and even the several arithmetic-logic units realising simultaneous fulfilment of several commands.

All it together with growth of clock rates of a kernel and buses promoted considerable growth of productivity of processors.

The following, by development of the architecture of processors implementation as a part of one chip of several kernels that would allow to create the difficult systems executing the commands in a parallel way at level of several processors would become logical. Some large corporations which are engaged in development and release of processors are gathered to select this path.

However, not considering all complexities of this solution, it is necessary to recognise, that the given path carries on to substantial growth of the price of products, at least, on the price of development, production, testing and korpusirovki the second kernel of the processor.

Experts of Intel have selected other, alternative path. They have carefully analyzed operation of all inner patterns of a kernel of the processor of NetBurst architecture. As a result they have detected, as it, however and it was expected, that load on some major sites of the processor is non-uniform. As consequence, during the separate moments some subsystems of a kernel of the processor appear loaded far not on 100 %. Moreover, in some cases idle time of the processor of the computer expecting new commands and data is observed. All it is linked to features of performance of tasks. To realise a spare of power of the processor it is possible at the expense of loading by its new tasks. It has thus appeared, that rather small complicating of the architecture of a kernel for this purpose is required, that slightly increases kernel square: approximately on 5 %. But this rather cheap solution allows to increase considerably productivity of processors without essential complicating of their architecture, and the main thing — cost prices.

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